NTE7071 integrated circuit dual, full ? bridge driver description: the NTE7071 is a high voltage, high current, dual, full ? bridge driver in a 15 ? lead staggered sip type package designed to accept standard ttl logic levels and drive inductive loads such as relays, sole- noids, dc, and stepping motors. t wo enable inputs are provided to enable or disable the device inde- pendently of the input signals. the emitters of the lower transistors of each bridge are connected to- gether and the corresponding external terminal can be used for the connection of an external sensing resistor. an additional supply input is provided so that the logic works at a lower voltage. features: operating supply voltage up to 46v total dc current up to 4a low saturation voltage overtemperature protection logical ?0? input voltage up to 1.5v (high noise immunity) absolute maximum ratings: power supply, v s 50v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . logical supply voltage, v ss 7v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input and enable voltage, v i , v en ? 0.3 to +7.0v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . peak output current (each channel), i o non ? repetitive (t = 100 s) 3a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . repetitive (80% on; 20% off, t on = 10ms) 2.5a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dc operation 2a . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sensing voltage, v sens ? 1 to +2.3v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . total power dissipation (t c = +75 c), p tot 25w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating junction temperature range, t j ? 40 to +150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg ? 40 to +150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . thermal resistance, junction ? to ? case, r thjc 3 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . thermal resistance, junction ? to ? ambient, r thja 35 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
electrical characteristics: (v s = 42v, v ss = 5v, t j = +25 c unless otherwise specified) parameter symbol test conditions min typ max unit supplu voltage (pin4) v s operative condition v ih +2.5 ? 46 v logic supply voltage (pin9) v ss 4.5 5.0 7.0 v quiescent supply current (pin4) i s v en = h, i l = 0 v i = l ? 13 22 ma v i = h ? 50 70 ma v en = l, v i = x ? ? 4 ma quiescent current from v ss (pin9) i ss v en = h, i l = 0 v i = l ? 24 36 ma v i = h ? 7 12 ma v en = l, v i = x ? ? 6 ma input low voltage (pin5, pin7, pin10, pin12) v il ? 0.3 ? 1.5 v input high voltage (pin5, pin7, pin10, pin12) v ih 2.3 ? v ss v low voltage input current (pin5, pin7, pin10, pin12) i il v i = l ? ? ? 10 a high voltage input current (pin5, pin7, pin10, pin12) i ih v i = h v ss ? 0.6v ? 30 100 a enable low voltage (pin6, pin11) v en = l ? 0.3 ? 1.5 v enable high voltage (pin6, pin11) v en = h 2.3 ? v ss v low voltage enable current (pin6, pin11) i en = l v en = l ? ? ? 10 a high voltage enable current (pin6, pin11) i en = h v en = h v ss ? 0.6v ? 30 100 a source saturation voltage v ce(sat) (h) i l = 1a ? 1.35 1.70 v i l = 2a ? 2.0 2.7 v sink saturation voltage v ce(sat) (l) i l = 1a, note 3 ? 1.2 1.6 v i l = 2a, note 3 ? 1.7 2.3 v to t a l d r o p v ce(sat) i l = 1a, note 3 ? ? 3.2 v i l = 2a, note 3 ? ? 4.9 v sensing voltage (pin1, pin15) v sens note 1 ? 1 ? 2 v source current turn ? off delay t 1 (v i ) 0.5 v i to 0.9 i l , note 2 ? 1.5 ? s fall time t 2 (v i ) 0.9 i l to 0.1 i l , note 2 ? 0.2 ? s turn ? on delay t 3 (v i ) 0.5 v i to 0.1 i l , note 2 ? 2 ? s rise time t 4 (v i ) 0.1 i l to 0.9 i l , note 2 ? 0.7 ? s sink current turn ? off delay t 5 (v i ) 0.5 v i to 0.9 i l , note 2 ? 0.7 ? s fall time t 6 (v i ) 0.9 i l to 0.1 i l , note 2 ? 0.25 ? s turn ? on delay t 7 (v i ) 0.5 v i to 0.9 i l , note 2 ? 1.6 ? s rise time t 8 (v i ) 0.1 i l to 0.9 i l , note 2 ? 0.2 ? s note 1. sensing voltage can be ? 1v for t 50 s; in steady state v sens min ? 0.5v. note 2. the load must be a pure resistor. note 3. pin1 and pin15 connected to gnd.
electrical characteristics (cont?d): (v s = 42v, v ss = 5v, t j = +25 c unless otherwise specified) parameter symbol test conditions min typ max unit commutation frequency f c (v i ) i l = 2a ? 25 40 khz source current turn ? off delay t 1 (v en ) 0.5 v en to 0.9 i l , note 2 ? 3 ? s fall time t 2 (v en ) 0.9 i l to 0.1 i l , note 2 ? 1 ? s turn ? on delay t 3 (v en) 0.5 v en to 0.1 i l , note 2 ? o.3 ? s rise time t 4 (v en ) 0.1 i l to 0.9 i l , note 2 ? 0.4 ? s sink current turn ? off delay t 5 (v en ) 0.5 v en to 0.9 i l , note 2 ? 2.2 ? s fall time t 6 (v en ) 0.9 i l to 0.1 i l , note 2 ? 0.35 ? s turn ? on delay t 7 (v en ) 0.5 v en to 0.1 i l , note 2 ? 0.25 ? s rise time t 8 (v en ) 0.1 i l to 0.9 i l , note 2 ? 0.1 ? s commutation frequency f c (v en ) i l = 2a ? 1 ? khz note 1. sensing voltage can be ? 1v for t 50 s; in steady state v sens min ? 0.5v. note 2. the load must be a pure resistor. note 3. pin1 and pin15 connected to gnd. supply voltage v s logic supply voltage v ss pin connection diagram (front view) output 1 output 2 input 4 output 4 current sensing a input 3 output 3 gnd input 1 input 2 current sensing b enable b 15 14 13 12 11 10 9 8 7 enable a 6 5 4 3 2 1
.689 (17.5) .699 (17.7) .860 (21.8) .150 (3.81) dia max .791 (20.1) .069 (1.75) .196 (4.99) .110 (2.79) .169 (4.29) .008 (.203) .050 (1.27) .200 (5.08) 15 1
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